A low-power dual-path floating-point fused add-subtract unit

This paper examines a low-power consumption dual-path fused floating-point add-subtract unit and compares it with previous fused add-subtract units such as the single path fused add-subtract unit with/without enhanced aligning and compound adder-round unit and the high-speed dual-path fused add-subtract unit. The high-speed dual-path fused add-subtract unit has less latency than the single-path fused add-subtract units, but with higher power consumption. To reduce the power consumption, a dual-path fused add-subtract unit with a simplified far/close path scheme is proposed; the significand addition, subtraction and round units are not included in the far/close paths while each path of the high-speed version has these units. The significand adder and subtractor are shared by far/close path. The power consumption of the proposed design is 18% lower than the high-speed dual-path fused add-subtract unit at a 16% cost in latency; however, the proposed dual-path fused add-subtract unit is 11-20% faster than the two single-path fused add-subtract units.