DocumentCode :
1800874
Title :
An Approach to Checking SOC Timing Safety
Author :
Du, Zhenjun ; Chen, Rong
Author_Institution :
Sch. of Inf. Sci. & Technol., Dalian Maritime Univ., Dalian, China
Volume :
2
fYear :
2009
fDate :
18-20 Aug. 2009
Firstpage :
181
Lastpage :
184
Abstract :
High-performance SOCs (system on a chip) are being widely used in multimedia signal processing. Timing behavior is a critical issue in high-performance design, and one of the significant and challenging problems in the SOC design is to ensure the safety of timing behavior. A model that combines Allen-Givone algebra in multi-valued logic and the waveform polynomial is presented in this paper. Functional and timing behavior can be precisely described simultaneously by one unified representation, allowing inputs and outputs of a multi-valued logic function to be described by multi-valued waveforms, which are consistent with commonly used intuitive waveforms. This method is applicable in precisely analyzing and checking the correctness and safety of SOC timing attributes.
Keywords :
formal logic; integrated circuit testing; performance evaluation; polynomials; system-on-chip; Allen-Givone algebra; SOC timing safety; functional behavior; high-performance design; multi-valued logic function; multi-valued waveforms; system-on-chip; timing behavior; unified representation; waveform polynomial; Algebra; Hazards; Logic functions; Multimedia systems; Multivalued logic; Polynomials; Safety; Signal processing; System-on-a-chip; Timing; SOC; multi-valued waveform function; timing safety;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Assurance and Security, 2009. IAS '09. Fifth International Conference on
Conference_Location :
Xian
Print_ISBN :
978-0-7695-3744-3
Type :
conf
DOI :
10.1109/IAS.2009.28
Filename :
5283171
Link To Document :
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