Mixed analog-digital design of a learning nano-circuit for neuronal architectures

Author

Hé, Michel ; Klein, Jacques-Olivier ; Belhaire, Eric

Author_Institution

IEF, Univ. Paris-Sud, Orsay

fYear

2008

fDate

25-27 March 2008

Firstpage

1

Lastpage

5

Abstract

The association of CNTFET and adjustable resistive devices is investigated to implement programmable logic using neural networks. A learning cell, based on switched capacitors principle, is designed in order to apply a simplified learning rule to program the resistances associated to each synaptic weight of the network. Electrical simulations validate the relevance of such approach.

Keywords

integrated circuit design; mixed analogue-digital integrated circuits; nanoelectronics; neural chips; programmable logic devices; switched capacitor networks; electrical simulation; learning cell; learning nanocircuit; mixed analog-digital design; neural network; neuronal architecture; programmable logic; switched capacitor; Analog-digital conversion; CMOS technology; Field programmable gate arrays; Logic devices; Logic functions; Logic programming; Neural networks; Neurons; Programmable logic arrays; Programmable logic devices; CNTFET; Neural networks; on-chip learning; programmable logic; solid electrolyte;

fLanguage

English

Publisher

ieee

Conference_Titel

Design and Technology of Integrated Systems in Nanoscale Era, 2008. DTIS 2008. 3rd International Conference on

Conference_Location

Tozeur

Print_ISBN

978-1-4244-1576-2

Electronic_ISBN

978-1-4244-1577-9

Type

conf

DOI

10.1109/DTIS.2008.4540247

Filename

4540247