DocumentCode
1801050
Title
Detecting bridging faults in dynamic CMOS circuits
Author
Chang, J.T.-Y. ; McCluskey, E.J.
Author_Institution
Center for Reliable Comput., Stanford Univ., CA, USA
fYear
1997
fDate
5-6 Nov. 1997
Firstpage
106
Lastpage
109
Abstract
New methods for detecting bridging faults in dynamic CMOS circuits are proposed. We show that resistive shorts in CMOS dynamic circuits can cause intermittent failures and reliability problems. We found that the defect coverage of resistive shorts, which we defined as the maximum detectable resistance of a short, in CMOS domino gates, can be improved by increasing the supply voltage to be about 40% higher than the normal operating voltage or by reducing the supply voltage to about 2V/sub t/, where V/sub t/ is the threshold voltage of a transistor.
Keywords
fault diagnosis; CMOS domino gates; bridging faults; defect coverage; dynamic CMOS circuits; intermittent failures; resistive shorts; supply voltage; threshold voltage; Circuit faults; Circuit testing; Clocks; Electrical fault detection; Fault detection; Performance evaluation; Switches; Switching circuits; Temperature; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
IDDQ Testing, 1997. Digest of Papers., IEEE International Workshop on
Conference_Location
Washington, DC, USA
Print_ISBN
0-8186-8123-3
Type
conf
DOI
10.1109/IDDQ.1997.633022
Filename
633022
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