Title :
A monolithic CMOS VCO for wireless LAN applications
Author :
Bhattacharjee, Jishnu ; Mukherjee, Debanjan ; Laskar, Joy
Author_Institution :
Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
A 5.5 GHz monolithic VCO is designed in standard 0.24 μm single-poly, 5-metal digital CMOS process. The VCO-core draws only 4.8 mW of DC power. The measured phase noise at 1 MHz offset from the center frequency is as low as -114 dBc/Hz. Tuning range of 16% covers the frequency bands for wireless LAN (IEEE802.11a and HiperLAN) standards in 5-6 GHz range. An optimal octagonal inductor structure and nMOS-pMOS complementary cross-coupled topology have enabled simultaneous achievement of low-power and low-phase-noise performance, and requisite tuning range is obtained by using nMOS-in-nwell accumulation varactor.
Keywords :
CMOS analogue integrated circuits; MMIC oscillators; Q-factor; circuit tuning; field effect MMIC; low-power electronics; phase noise; voltage-controlled oscillators; wireless LAN; 0.24 micron; 4.8 mW; 5 to 6 GHz; 5.5 GHz; CMOS; HiperLAN; IEEE802.11a; VCO; frequency bands; low-phase-noise performance; low-power performance; nMOS-in-nwell accumulation varactor; nMOS-pMOS complementary cross-coupled topology; optimal octagonal inductor structure; phase noise; tuning range; wireless LAN applications; CMOS process; Frequency measurement; Inductors; Measurement standards; Noise measurement; Phase measurement; Phase noise; Tuning; Voltage-controlled oscillators; Wireless LAN;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010255
