Concepts and optimization of CMOS LC_VCO circuits via geometric program

Author

Issa, Dalenda Ben ; Kachouri, Abdennaceur ; Samet, Mounir

Author_Institution

Lab. of Electron. & Technol. of Inf., Nat. Sch. of Eng. of Sfax, Sfax

fYear

2008

fDate

25-27 March 2008

Firstpage

1

Lastpage

6

Abstract

A method of optimizing components and transistors sizing for CMOS LC oscillators is presented in this paper. The design constraints equations of power consumption, tank voltage amplitude, start up condition, and phase noise of VCO are offered on GP form. The VCO circuit was automatically generated using this technique in a 0.35 mum CMOS process, which is also modeled in a form compatible with geometric programming. The results show the sizing of components of the complementary integrated LCVCO and the optimal trade-off curve between minimum power and minimum phase noise.

Keywords

CMOS integrated circuits; geometry; integrated circuit design; mathematical programming; phase noise; transistors; voltage-controlled oscillators; CMOS LC VCO circuits; component optimisation; design constraints equations; geometric programming; phase noise; size 0.35 mum; transistors sizing; CMOS process; Circuits; Energy consumption; Equations; Optimization methods; Phase noise; Semiconductor device modeling; Solid modeling; Voltage; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Design and Technology of Integrated Systems in Nanoscale Era, 2008. DTIS 2008. 3rd International Conference on

Conference_Location

Tozeur

Print_ISBN

978-1-4244-1576-2

Electronic_ISBN

978-1-4244-1577-9

Type

conf

DOI

10.1109/DTIS.2008.4540268

Filename

4540268