Abstract :
An heuristic method oriented to compute the elements embedded into a positive feedback loop (PFL), is presented. The or concept is introduced first, in order to model the behavior of all active devices and controlled sources. From a or circuit, a congruence transformation is done in order to obtain a matrix called L, having an order 2N × 2N, N as the number of ors. By partitioning L, all the PFLs can be easily computed. Finally, the elements embedded into each PFL are obtained by searching for loops involving ator-norator pairs, associated to the ors forming a PFL computed from the matrix L.
Keywords :
active networks; analogue circuits; circuit feedback; matrix algebra; network analysis; active devices; ator-norator pairs; congruence transformation; controlled sources; heuristic method; matrix; or concept; positive feedback loop; Analog circuits; Analog computers; Circuit simulation; Design optimization; Embedded computing; Feedback loop; MOSFETs; Network topology; Output feedback; Symmetric matrices;