Title :
A low-voltage MOS cascode bias circuit for all current levels
Author :
Minch, Bradley A.
Author_Institution :
Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY, USA
Abstract :
In this paper, the author describes a simple low-voltage MOS cascode bias circuit that functions well at all current levels, ranging from weak inversion to strong inversion. He describes an approach to defining the onset of saturation that is generally useful from a bias-circuit design viewpoint and explains specifically how it was used in designing the low-voltage cascode bias circuit. The author discusses an efficient strategy for laying out the cell in the full-stacked style. He also presents experimental results from a version of the bias circuit that was fabricated in a 1.2-μm CMOS process
Keywords :
CMOS analogue integrated circuits; integrated circuit design; low-power electronics; 1.2 micron; CMOS process; LV MOS cascode bias circuit; bias-circuit design; cell layout; full-stacked style; low-voltage bias circuit; saturation onset; Analog integrated circuits; CMOS process; Circuit topology; MOS devices; MOSFETs; Operational amplifiers; Power supplies; Threshold voltage; Transconductance; Zirconium;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Conference_Location :
Phoenix-Scottsdale, AZ
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010300