Title :
Silicon validation of evolution-designed circuits
Author :
Stoica, Adrian ; Zebulum, Ricardo S. ; Guo, Xin ; Keymeulen, Didier ; Ferguson, M.I. ; Duong, Vu
Author_Institution :
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
Abstract :
No silicon fabrication and characterization of circuits with topologies designed by evolution has been done before, leaving open questions about the feasibility of the evolutionary design approach, as well as on how high performance, robust, or portable such designs could really be when implemented in hardware. This paper is the first to report on a silicon implementation of circuits evolved in simulation. Several circuits were evolved and fabricated in a 0.5-micron CMOS process. This paper focuses on results of logical gates evolved at a transistor level. It discusses the steps taken in order to increase the chances of robust and portable designs, summarizes the results of characterization tests based on chip measurements, and comments on the performance comparing to simulations.
Keywords :
CMOS logic circuits; circuit CAD; integrated circuit design; logic CAD; CMOS process; FPGA chip; characterization test; chip measurement; circuit simulation; circuit topology; circuits evolution; design-for-fabrication; evolution-designed circuit; evolutionary circuit design; field programmable gate array; logical gate; silicon fabrication; silicon validation; test ASIC; transistor level; Circuit simulation; Circuit synthesis; Circuit testing; Circuit topology; Field programmable gate arrays; Hardware; Propulsion; Robustness; Scalability; Silicon;
Conference_Titel :
Evolvable Hardware, 2003. Proceedings. NASA/DoD Conference on
Print_ISBN :
0-7695-1977-6
DOI :
10.1109/EH.2003.1217638
