Implementing evolution of FIR-filters efficiently in an FPGA

Author

Vinger, Knut Arne ; Torresen, Jim

Author_Institution

Dept. of Informatics, Univ. of Oslo, Norway

fYear

2003

fDate

9-11 July 2003

Firstpage

26

Lastpage

29

Abstract

Reconfigurable hardware devices make it possible to change the topology of electronic circuits at runtime. Using reconfigurable devices as a platform for evolvable hardware (EHW) is well suited for real-time adaptive systems. This paper contains a novel approach on how to evolve the parameters for an adaptive digital filter. Both the filter as well as the evolution is implemented in a single field programmable gate array (FPGA). The circuit is based on context-switching in FPGA-devices and preliminary results indicate a compact hardware as well as fast adaptation.

Keywords

FIR filters; adaptive filters; evolutionary computation; field programmable gate arrays; logic circuits; real-time systems; reconfigurable architectures; DSP system; EHW; FIR-filter evolution; FPGA device; adaptive digital filter; compact hardware; context-switching; digital signal processing; electronic circuit topology; evolvable hardware; fast adaptation; field programmable gate array; hardware architecture; high performance computing circuits; real-time adaptive system; reconfigurable hardware device; Adaptive filters; Digital filters; Digital signal processing; Field programmable gate arrays; Finite impulse response filter; Flexible printed circuits; Hardware; High performance computing; Informatics; Real time systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Evolvable Hardware, 2003. Proceedings. NASA/DoD Conference on

Print_ISBN

0-7695-1977-6

Type

conf

DOI

10.1109/EH.2003.1217639

Filename

1217639