Title :
New insights on bottom layer thermal stability and laser annealing promises for high performance 3D VLSI
Author :
Fenouillet-Beranger, C. ; Mathieu, B. ; Previtali, B. ; Samson, M.-P. ; Rambal, N. ; Benevent, V. ; Kerdiles, S. ; Barnes, J.-P. ; Barge, D. ; Besson, P. ; Kachtouli, R. ; Casse, M. ; Garros, X. ; Laurent, A. ; Nemouchi, F. ; Huet, K. ; Toque-Tresonne, I.
Author_Institution :
CEA-LETI, Grenoble, France
Abstract :
For the first time the maximum thermal budget of in-situ doped source/drain State Of The Art (SOTA) FDSOI bottom MOSFET transistors is quantified to ensure transistors stability in Sequential 3D (CoolCube™) integration. We highlight no degradation of Ion/Ioff trade-off up to 550°C. Thanks to both metal gate work-function stability especially on short devices and silicide stability improvement, the top MOSFET temperature could be relaxed up to 500°C. Laser anneal is then considered as a promising candidate for junctions activation. Based on in-depth morphological and electrical characterizations it demonstrates very promising results for high performance Sequential 3D integration.
Keywords :
MOSFET; VLSI; circuit stability; laser beam annealing; silicon-on-insulator; thermal stability; three-dimensional integrated circuits; 3D VLSI; CoolCube integration; FDSOI bottom MOSFET transistor; SOTA; Si; bottom layer thermal stability; in-situ doped source-drain state of the art; junction activation; laser annealing; maximum thermal budget; metal gate work-function stability; sequential 3D integration; silicide stability improvement; Annealing; Implants; Laser stability; Logic gates; MOS devices; Thermal stability; Transistors;
Conference_Titel :
Electron Devices Meeting (IEDM), 2014 IEEE International
Conference_Location :
San Francisco, CA
DOI :
10.1109/IEDM.2014.7047121
