DocumentCode
1803435
Title
Evolution of combinatorial and sequential online self-diagnosing hardware
Author
Garvie, Miguel ; Thompson, Adrian
Author_Institution
Sch. of Cognitive & Comput. Sci., Univ. of Sussex, Brighton, UK
fYear
2003
fDate
9-11 July 2003
Firstpage
167
Lastpage
173
Abstract
The evolution of circuits with online built-in self-test is attempted in simulation for a full adder, two-bit multiplier and edge triggered D-latch. Results show that the evolved designs perform full diagnosis using less or equal number of components than hand-designed equivalents.
Keywords
built-in self test; combinational circuits; fault diagnosis; genetic algorithms; logic simulation; logic testing; real-time systems; sequential circuits; BIST; VLSI array; built-in self-test; circuit evolution; circuit module; combinatorial circuit; diagnosis design; edge triggered D-latch; online self-diagnosing hardware; sequential circuit; two bit multiplier; very large scale integration; Adders; Built-in self-test; Circuit faults; Circuit testing; Genetic algorithms; Genetic mutations; Hardware; Logic circuits; Logic testing; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Evolvable Hardware, 2003. Proceedings. NASA/DoD Conference on
Print_ISBN
0-7695-1977-6
Type
conf
DOI
10.1109/EH.2003.1217663
Filename
1217663
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