A 50% duty-cycle correction circuit for PLL output

Author

Gawa, T. ; Taniguchi, Kenji

Author_Institution

Dept. of Electron. & Inf. Syst., Osaka Univ., Japan

Volume

4

fYear

2002

fDate

2002

Abstract

A 50% duty-cycle correction circuit was proposed to tighten duty-cycle into an allowable range to increase the yield of PLLs designed with deep submicron design rules. The circuit composed of duty-detection and duty-correction sub-circuits reduces the duty-cycle fluctuation of PLLs originating from the mismatches of devices and transient responses in signal paths. The 50% duty-cycle correction circuit fabricated with a 0.6 μm design rule demonstrated that all the input signals in the range of duty-cycle from 20 to 80% turn out to be duty-cycle fluctuation of 0.21% at the output, achieving one-three hundredths of reduction of duty-cycle fluctuation.

Keywords

CMOS analogue integrated circuits; VLSI; detector circuits; integrated circuit design; integrated circuit yield; phase locked loops; transient response; 0.6 micron; PLL output; deep submicron design rules; duty-correction sub-circuits; duty-cycle correction circuit; duty-cycle fluctuation; duty-detection sub-circuits; input signals; transient responses; yield; Active filters; Charge pumps; Circuits; Clocks; Detectors; Fluctuations; Phase locked loops; Signal design; Signal generators; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010378

Filename

1010378