DocumentCode
180439
Title
Evolution of Multi-Gigabit Wireline Transceivers in CMOS
Author
Fujimori, Ichiro
Author_Institution
Broadcom Corp., Irvine, CA, USA
fYear
2014
fDate
19-22 Oct. 2014
Firstpage
1
Lastpage
4
Abstract
Since the first OC-192 transceiver in CMOS was introduced in 2000, architecture and technology advancements have pushed wireline transceivers in CMOS to mainstream, even for OC-768 data rates. A diverse portfolio of multi-gigabit SerDes I/Os is now essential for large scale SOCs, not only for Networking but also Consumer applications. DSP-based transceivers with ADC frontends have forced a paradigm shift in how wireline transceivers are architected. This paper covers the evolution of CMOS wireline transceivers at Broadcom.
Keywords
CMOS integrated circuits; analogue-digital conversion; radio transceivers; system-on-chip; ADC frontends; Broadcom; CMOS wireline transceivers; DSP-based transceivers; OC-192 transceiver; OC-768 data rates; consumer applications; large scale SOC; multi-gigabit SerDes I-O; networking; CMOS integrated circuits; CMOS technology; Jitter; Receivers; Standards; System-on-chip; Transceivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Compound Semiconductor Integrated Circuit Symposium (CSICs), 2014 IEEE
Conference_Location
La Jolla, CA
Type
conf
DOI
10.1109/CSICS.2014.6978553
Filename
6978553
Link To Document