DocumentCode
1804524
Title
FlexCache: Field Extensible Cache Controller Architecture Using On-chip Reconfigurable Fabric
Author
Lo, Daniel ; Malysa, Greg ; Suh, G. Edward
Author_Institution
Cornell Univ., Ithaca, NY, USA
fYear
2011
fDate
5-7 Sept. 2011
Firstpage
244
Lastpage
251
Abstract
In today´s microprocessors, the cache architecture is highly optimized for one particular design and cannot be changed after fabrication. While allowing efficient implementations in dedicated logic, this inflexibility also implies that new techniques cannot be deployed in the field. This paper presents Flex Cache, a flexible cache architecture that uses on-chip reconfigurable fabric to enable new extensions to be added in the field after fabrication. We evaluate the flexibility and efficiency of the architecture through an RTL prototype implementation of the cache along with example extensions such as cache performance counters, side-channel protection, prefetching, various replacement policies and computation acceleration. The results show that various types of extensions can be realized on Flex Cache with minimal impact on performance, power, and area.
Keywords
cache storage; microprocessor chips; FlexCache; RTL prototype; cache architecture; cache performance counters; computation acceleration; field extensible cache controller architecture; microprocessors; on-chip reconfigurable fabric; side-channel protection; Computer architecture; Fabrics; Monitoring; Prefetching; Process control; Radiation detectors; Registers; FPGA; cache controller; reconfigurable cache; reconfigurable fabric;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications (FPL), 2011 International Conference on
Conference_Location
Chania
Print_ISBN
978-1-4577-1484-9
Electronic_ISBN
978-0-7695-4529-5
Type
conf
DOI
10.1109/FPL.2011.50
Filename
6044772
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