PLLs, VCOs, and dividers

Phase-locked loop (PLL) frequency synthesizers are critical building blocks for wireless transceivers. Frequency synthesis requires integrated oscillators and dividers that can provide superior phase noise performance at ultra-high frequencies. This session focuses on design of high-performance PLLs and building blocks, including voltage- and current-controlled oscillators and frequency dividers. The session is split into two parts with a break from 10:45am to 11:05am.