Dynamic limits of a power factor preregulator

Author

Fernández, A. ; Sebastián, J. ; Villegas, P. ; Hernando, M.M. ; García, J.

Author_Institution

Grupo de Electronica Ind., Univ. de Oviedo, Gijon, Spain

Volume

4

fYear

2003

fDate

15-19 June 2003

Firstpage

1697

Abstract

Power factor correction has been one of the hottest topics during the last years and hence, many new circuits have appeared. In general, it is assumed that preregulators based on multiplier circuits have poor dynamics and then, a second stage is needed to improve the output voltage dynamic behaviour. The other option is the use of single stage topologies which have fast output voltage regulation although the input current waveform is not sinusoidal. This paper presents an analysis of the dynamic behaviour of a conventional power factor preregulator. The objective is to find the limits of the dynamic characteristics of these circuits when the priority is to improve the output voltage regulation and not the total harmonic distortion or the power factor. A large signal model is presented and the theoretical results are validated with a prototype.

Keywords

dynamic response; power factor correction; voltage control; voltage regulators; dynamic behaviour; dynamic characteristics; dynamic limits; large signal model; multiplier circuits; output voltage regulation; power factor correction; power factor preregulator; single stage topology; sinusoidal input current waveform; total harmonic distortion; Circuit topology; Error correction; IEC standards; Low pass filters; Power factor correction; Power harmonic filters; Prototypes; Reactive power; Total harmonic distortion; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics Specialist Conference, 2003. PESC '03. 2003 IEEE 34th Annual

ISSN

0275-9306

Print_ISBN

0-7803-7754-0

Type

conf

DOI

10.1109/PESC.2003.1217712

Filename

1217712