A 4.8mW inductorless CMOS frequency divider-by-4 with more than 60% fractional bandwidth up to 70GHz

Author

Ghilioni, Andrea ; Decanis, Ugo ; Mazzanti, Andrea ; Svelto, Francesco

Author_Institution

Dipt. di Ing. Ind. e dell´´Inf., Univ. degli Studi di Pavia, Pavia, Italy

fYear

2012

fDate

9-12 Sept. 2012

Firstpage

1

Lastpage

4

Abstract

Frequency synthesizers at mm-waves would benefit from wide-band low-power dividers with large division factors. This work proposes a divider-by-4 based on clocked differential amplifiers working as dynamic CML latches. The clock modulates both the tail current and the load resistance of the differential pair, allowing a wide locking range. Prototypes, realized in 32nm CMOS, operate between 14GHz and 70GHz demonstrating a fractional bandwidth in excess of 60% in the entire range, 4.8mW of maximum power consumption and 55×18μm² occupied area.

Keywords

CMOS integrated circuits; differential amplifiers; frequency dividers; frequency synthesizers; bandwidth 14 GHz to 70 GHz; clocked differential amplifiers; dynamic CML latches; fractional bandwidth; frequency synthesizers; inductorless CMOS frequency divider-by-4; large division factors; load resistance; power 4.8 mW; size 32 nm; tail current; wide-band low-power dividers; Bandwidth; CMOS integrated circuits; Clocks; Frequency conversion; Latches; Power demand; Resistance; Frequency divider and CMOS technology; Low power electronics; Millimeter wave circuits; Wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference (CICC), 2012 IEEE

Conference_Location

San Jose, CA

ISSN

0886-5930

Print_ISBN

978-1-4673-1555-5

Electronic_ISBN

0886-5930

Type

conf

DOI

10.1109/CICC.2012.6330595

Filename

6330595