DocumentCode
1804793
Title
Design of TVP5150 controller based on FPGA
Author
Juan Li ; Yan-ying Liu
Author_Institution
Changchun Institute of Optics, Fine Mechanics and Phys-ics, Chinese Academy of Sciences, China
fYear
2013
fDate
1-8 Jan. 2013
Firstpage
1
Lastpage
4
Abstract
In this paper, a design of TVP5150 controller based on FPGA (Field Programmable Gate Array) is proposed. This design uses the series of VIRTEX-4 XC4VSX25 chip to control the video decoder TVP5150. FPGA initialized video decoder TVP5150 via IIC bus standard. In order to decode the video data, the input channel, working state and the output data format of TVP5150 should be configured. In this paper, it describes the method of initializing TVP5150 through FPGA based on IIC bus. And then, introduce the format of ITU-R BT.656 of the output video data and the way of extracting the available data from ITU-R BT.656.
Keywords
Pins; Registers; Timing; FPGA (Field Programmable Gate Array); IIC bus; ITU-R BT.656; video decoder TVP5150;
fLanguage
English
Publisher
ieee
Conference_Titel
Conference Anthology, IEEE
Conference_Location
China
Type
conf
DOI
10.1109/ANTHOLOGY.2013.6784942
Filename
6784942
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