DocumentCode
1804881
Title
Design of a monolithic CMOS image sensor integrated focal plane wire-grid polarizer filter mosaic
Author
Wu, Xiaotie ; Zhang, Milin ; Engheta, Nader ; Van der Spiegel, Jan
Author_Institution
Dept. of Electr. & Syst. Eng. (ESE), Univ. of Pennsylvania, Philadelphia, PA, USA
fYear
2012
fDate
9-12 Sept. 2012
Firstpage
1
Lastpage
4
Abstract
Polarization is one of the important characteristics of visible light that can not be detected by human visual system or traditional image sensors. In this paper, we report on an image sensor integrated focal plane 2 × 2 wire-grid polarizer filter mosaic targeted at visible spectrum fabricated in 65nm standard CMOS processing line, which enables the reconstruction of the polarization response characteristic for each pixel. Finite-Difference Time-Domain method has been used for the first time to optimize the extinction ratio in visible spectrum of the multilayer focal plane wire-grid polarizer. Experimental results show that an extinction ratio around 10 is achieved with a standard error of around 0.25% between the experimental results and the fitting sinusoidal polarization response curve. A phase error at the level of less than 2% to the measurement phase resolution is achieved. These results are the best reported for a monolithic wire-grid polarization image sensor design for visible spectrum.
Keywords
CMOS image sensors; finite difference time-domain analysis; focal planes; finite-difference time-domain method; fitting sinusoidal polarization response curve; human visual system; integrated focal plane wire-grid polarizer filter mosaic; measurement phase resolution; monolithic CMOS image sensor; monolithic wire-grid polarization image sensor design; multilayer focal plane wire-grid polarizer; phase error; size 65 nm; standard CMOS processing line; visible light characteristics; visible spectrum; Arrays; CMOS image sensors; CMOS integrated circuits; Extinction ratio; Gratings; Metals; Standards;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference (CICC), 2012 IEEE
Conference_Location
San Jose, CA
ISSN
0886-5930
Print_ISBN
978-1-4673-1555-5
Electronic_ISBN
0886-5930
Type
conf
DOI
10.1109/CICC.2012.6330605
Filename
6330605
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