Title :
A low-voltage low-noise digital buffer system
Author :
Secareanu, Radu M. ; Peterson, Bill ; Hartman, Davis
Author_Institution :
Semicond. Products Sector, Motorola Inc., Tempe, AZ, USA
Abstract :
A novel low-voltage CMOS digital buffer is proposed. The primary characteristic of this digital buffer is the low voltage operation (VDD between one and two transistor threshold voltages (V(TB)), with a typical VDD = 1.5VT). While operating at this reduced power supply, low noise and high overall performances are achieved.
Keywords :
CMOS logic circuits; buffer circuits; circuit simulation; integrated circuit noise; low-power electronics; circuit simulations; low noise performance; low voltage operation; low-voltage low-noise CMOS digital buffer system; low-voltage low-noise logic family; transistor threshold voltages; Analog circuits; Circuit noise; Digital systems; Logic; Low voltage; Power dissipation; Power generation; Power supplies; Power system reliability; System-on-a-chip;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010419
