DocumentCode :
1805404
Title :
A 0.65V embedded SDRAM with smart boosting and power management in a 45nm CMOS technology
Author :
Pyo, Suk-Soo ; Kim, Jun-Sung ; Kim, Jung-Han ; Jung, Hyun-Taek ; Song, Tae-Joong ; Lee, Cheol-Ha ; Kim, Gyu-Hong ; Lee, Young-Keun ; Kim, Kee-Sup
Author_Institution :
Design Technol., Syst. LSI, Samsung Electron., Yongin, South Korea
fYear :
2012
fDate :
9-12 Sept. 2012
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, an embedded SDRAM (eSDRAM) with smart boosting and power management (SB-PM) scheme for low power operation has been designed. SB-PM scheme decreases 40.3% of dynamic power and 69.1% of standby power consumption with ECC compared with the conventional scheme. A 266-Mb eSDRAM with SB-PM scheme is designed in a 45-nm CMOS technology showing 51.2-mW dynamic power and 2.05mW standby power consumption at VDD=0.65V and 85°C.
Keywords :
CMOS integrated circuits; DRAM chips; embedded systems; low-power electronics; power consumption; CMOS technology; ECC; SB-PM scheme; conventional scheme; dynamic power; eSDRAM; embedded SDRAM; low power operation; memory size 266 MByte; power 2.05 mW; power 51.2 mW; power management scheme; smart boosting scheme; standby power consumption; voltage 0.65 V; Arrays; Boosting; Capacitors; Low voltage; Power demand; Random access memory; Sensors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2012 IEEE
Conference_Location :
San Jose, CA
ISSN :
0886-5930
Print_ISBN :
978-1-4673-1555-5
Electronic_ISBN :
0886-5930
Type :
conf
DOI :
10.1109/CICC.2012.6330622
Filename :
6330622
Link To Document :
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