Title :
Series connection of IGBTs used multilevel clamp circuit and turn off timing adjustment circuit
Author :
Nakatake, Hiroshi ; Iwata, Akihiko
Author_Institution :
Adv. Technol. R&D Center, Mitsubishi Electr. Co., Hyogo, Japan
Abstract :
Because of its superior switching characteristics, it is useful to connect IGBTs in series in high voltage inverters. In series connected IGBTs, the differences in the switching timing causes a overvoltage and a power loss imbalance. To clamp the overvoltage in the turn-off transient period, a peak-clamp circuit and a dv/dt-clamp circuit were developed. The peak-clamp circuit clamps the overvoltage under the rating of the IGBT. The dv/dt-clamp circuit depresses the dv/dt to be able to clamp the overvoltage by the peak-clamp circuit. By using the above two clamp circuits, the overvoltage is clamped perfectly under the rated voltage of the IGBTs. The collector-emitter voltage in the tailing current period is improved to 2400 V from 3300 V by the tailing current period clamp circuit. To improve the power loss imbalance due to the differences in the turn-off timing, an automatic adjustment circuit for the turn-off timing was developed. The collector-emitter voltage in the tailing current period is used as the signal for the timing adjustment circuit. The timing adjustment circuit can reduce the turn-off timing delay within 100 ns between two series connected IGBTs at the DC-link voltage values from 3300 V to 3700 V. By utilizing these circuits, series connected IGBTs can be applied to high voltage inverters.
Keywords :
delays; differentiating circuits; insulated gate bipolar transistors; invertors; overvoltage protection; timing circuits; 2400 V; 3300 to 3700 V; DC-link voltage; IGBT overvoltage; IGBT series connection; IGBT switching characteristic; IGBT voltage rating; automatic adjustment circuit; collector-emitter voltage; dv/dt-clamp circuit; multilevel clamp circuit; peak-clamp circuit; power loss imbalance; switching timing; tailing current period; timing delay; turn off timing adjustment circuit; turn-off transient period; voltage inverter; Clamps; Delay; Insulated gate bipolar transistors; Inverters; Protection; Research and development; Snubbers; Switching circuits; Timing; Voltage control;
Conference_Titel :
Power Electronics Specialist Conference, 2003. PESC '03. 2003 IEEE 34th Annual
Print_ISBN :
0-7803-7754-0
DOI :
10.1109/PESC.2003.1217744