Title :
A 100 MHz two-phase four-segment DC-DC converter with light load efficiency enhancement in 0.18 μm CMOS technology
Author :
Peng, Han ; Anderson, David I. ; Hella, Mona M.
Author_Institution :
GE Global Res. Center, Niskayuna, NY, USA
Abstract :
A two-phase four-segment DC-DC converter with novel coupled-inductors output network utilizing phase shedding and phase segmentation is presented for light load efficiency enhancement. The coupled inductor network increases the effective inductance value and reduces inductor current ripple. To improve light load efficiency, resonant gate drivers are employed to reduce driver losses. The DC-DC converter is implemented in 0.18 μm six-metal CMOS technology with 5 V devices, and occupies a total area of 7.77 mm2. The converter achieves a peak efficiency of 77.8% at 6 W output with 5% efficiency improvement at 1 V output due to the use of resonant gate drivers. Furthermore, with phase shedding, the converter maintains peak efficiency as the output current varies from 0.1 A to 1.86 A.
Keywords :
CMOS integrated circuits; DC-DC power convertors; coupled-inductors output network; current 0.1 A to 1.86 A; driver losses reduction; efficiency 5 percent; efficiency 77.8 percent; frequency 100 MHz; light load efficiency enhancement; phase segmentation; phase shedding; resonant gate drivers; six-metal CMOS technology; size 0.18 mum; two-phase four-segment dc-dc converter; voltage 1 V; voltage 5 V; CMOS integrated circuits; Couplings; Delay; Inductors; Logic gates; Switching frequency; Topology;
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2012 IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4673-1555-5
Electronic_ISBN :
0886-5930
DOI :
10.1109/CICC.2012.6330631
