A new paradigm of using TEM in yield enhancement failure analysis for sub-micron integrated circuit devices

Transmission electron microscope (TEM) has evolved from awkward-to-operate instrument into microprocessor-controlled instrument with various detectors attached. Improvement in the sample preparation from mechanical polishing to focused ion beam (FIB) assisted polishing has greatly improved the cycle time from days to few hours, enabling TEM is used as an essential tool in wafer fabrication plant. It is initially used as a process characterization tool, but the fast advancement of sub-micron integrated circuit has emerged TEM as essential equipment in yield enhancement failure analysis. As yield loss is increasingly dependent on critical features such as contacts and vias, conventional inspection method by scanning electron microscope (SEM) after deprocessing becomes constraint. Top down deprocessing follows by SEM examination cannot explain the root cause and it must depend on TEM to observe the detail of defect clearly. The role of SEM also evolves from inspection to passive voltage oriented. In other words, extensive voltage contrast is needed especially in stacked vias or contact. This paper explains the paradigm shift from conventional SEM examination analysis to TEM analysis. A few cases studies are presented to clarify this new paradigm.