Title :
A Model for Matrix Multiplication Performance on FPGAs
Author :
Lin, Colin Yu ; So, Hayden Kwok-Hay ; Leong, Philip H W
Author_Institution :
Electr. & Electron. Eng., Univ. of Hong Kong, Hong Kong, China
Abstract :
Computations involving matrices form the kernel of a large spectrum of computationally demanding applications for which FPGAs have been utilized as accelerators. Their performance is related to their underlying architectural and system parameters such as computational resources, memory and I/O bandwidth. A simple analytic model that gives an estimate of the performance of FPGA-based sparse matrix-vector and matrix-matrix multiplication is presented, dense matrix multiplication being a special case. The efficiency of existing implementations are compared to the model and performance trends for future technologies examined.
Keywords :
field programmable gate arrays; matrix multiplication; sparse matrices; FPGA; I/O bandwidth; accelerator; architectural parameter; computational resource; dense matrix multiplication; matrix-matrix multiplication; memory; sparse matrix-vector; system parameter; Bandwidth; Computational modeling; Field programmable gate arrays; Matrix decomposition; Schedules; Sparse matrices; System-on-a-chip; FPGA; matrix multiplication; performance model; technology trend;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2011 International Conference on
Conference_Location :
Chania
Print_ISBN :
978-1-4577-1484-9
Electronic_ISBN :
978-0-7695-4529-5
DOI :
10.1109/FPL.2011.62
