Design of low power 2.4 GHz CMOS LC oscillators with low phase-noise and large tuning range

Author

Seshan, Nilakantan ; Rajagopalan, Jay ; Mayaram, Kartikeya

Author_Institution

Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA

Volume

4

fYear

2002

fDate

2002

Abstract

The design of two 2.4 GHz CMOS LC balanced oscillators in a 0.25 μm process for Bluetooth specifications is presented. These oscillators achieve low phase noise with low power consumption. At a frequency offset of 3 MHz from the 2.4 GHz carrier, the simulated phase noise is -132 dBc/Hz for both oscillators with a power dissipation of 5-11 mW from a 2.5 V power supply. A wide tuning range of 18% is obtained by means of a PMOS varactor in conjunction with an array of switched capacitors.

Keywords

CMOS analogue integrated circuits; UHF integrated circuits; UHF oscillators; circuit tuning; integrated circuit design; integrated circuit noise; low-power electronics; network topology; phase noise; switched capacitor networks; voltage-controlled oscillators; 0.25 micron; 2.4 GHz; 2.5 V; 5 to 11 mW; Bluetooth specifications; CMOS LC balanced oscillators; PMOS varactor; VCO; frequency offset; large tuning range; low phase-noise; low power 2.4 GHz CMOS LC oscillator design; low power consumption; simulated phase noise; switched capacitor array; Bluetooth; CMOS process; Energy consumption; Frequency; Oscillators; Phase noise; Power dissipation; Power supplies; Tuning; Varactors;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010478

Filename

1010478