A 22dB PSRR enhancement in a two-stage CMOS opamp using tail compensation

A new compensation technique known as tail compensation is applied to a two-stage CMOS operational amplifier. The compensation is established by a capacitor connected between the output node and the source node of the differential amplifier. For the selected opamp topology, tail compensation allows better performance in terms of bandwidth and power supply rejection ratio (PSRR) when compared to Miller and cascode compensation. Operational amplifiers using Miller, cascode and tail compensation were fabricated in a 0.5-μm 2P3M CMOS process. The circuits operate at a total quiescent current of 90 μA with ±1.5V power supplies. Experimental results show that tail compensation increases the unity-gain frequency by 60% and 25% and improves PSRR from the positive rail by 22 dB and 26 dB over a frequency range from 23 kHz to 3.0 MHz compared to Miller and cascode compensation, respectively.