A calibrated pathfinding model for signal integrity analysis on interposer

Author

Kim, Jaemin ; Kim, Sunyoung ; Ryckaert, Julien ; Detalle, Mikael ; Van Hoovels, Nele ; Marchal, Pol

Author_Institution

imec, Leuven, Belgium

fYear

2012

fDate

9-12 Sept. 2012

Firstpage

1

Lastpage

4

Abstract

A calibrated pathfinding on silicon interposer is presented for exploring the impact of interconnect geometries on signal integrity. ABCD matrix-based model and single bit method are used for the pathfinding by estimating the worst-case eye opening. Experiment-based eye-diagrams using measured S-parameters on the fabricated silicon interposer are compared with the pathfinding showing 6% max difference. The pathfinding utilizes to optimize design parameters with 99% reduce of simulation time. It also extends for the optimization of parameters in multi interconnects considering mutual effects as well as crosstalk.

Keywords

S-parameters; circuit optimisation; geometry; integrated circuit design; integrated circuit interconnections; ABCD matrix-based model; S-parameter; calibrated pathfinding model; crosstalk; experiment-based eye-diagram; fabricated silicon interposer; interconnect geometry; multiinterconnects; optimize design parameter; signal integrity analysis; single bit method; Clocks; Computational modeling; Crosstalk; Integrated circuit interconnections; Silicon; Transfer functions; Transmission line matrix methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference (CICC), 2012 IEEE

Conference_Location

San Jose, CA

ISSN

0886-5930

Print_ISBN

978-1-4673-1555-5

Electronic_ISBN

0886-5930

Type

conf

DOI

10.1109/CICC.2012.6330688

Filename

6330688