Impact of interconnect performances on circuit design

The evolution of interconnect technologies is presented in terms of density and electrical performance, and compared to the parallel evolution of transistor characteristics and circuit complexity. Definition of “gate delays” and “interconnect delays”, and their evolution, are presented. The increasing impact of interconnect delays is emphasized, together with signal integrity problems and cross-coupling effects. Safe design solutions are presented (when available), and interconnect technology evolution is suggested, or required, to solve new problems which are approaching due to increased operating frequency and reduced power supply voltage. Trade-offs between interconnect resistances (vias and wires), capacitances (intra and inter layer) and their impact on performance are discussed. As a conclusion, the main requirements for interconnect technology evolution are presented from a circuit design viewpoint