DocumentCode :
1807731
Title :
0.8 V CMOS content-addressable-memory (CAM) cell circuit with a fast tag-compare capability using bulk PMOS dynamic-threshold (BP-DTMOS) technique based on standard CMOS technology for low-voltage VLSI systems
Author :
Shen, Edward ; Kuo, James B.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Volume :
4
fYear :
2002
fDate :
2002
Abstract :
This paper reports a novel 0.8 V content addressable memory (CAM) cell circuit with a fast tag-compare capability using the bulk PMOS dynamic-threshold (BP-DTMOS) technique based on standard CMOS technology following the SOI DTMOS technology for low-voltage VLSI systems. Using four PMOS devices with their body controlled dynamically in the tag-compare portion, this CAM cell, which is built in standard bulk CMOS technology using the BP-DTMOS technique, has a faster tag-compare operation at a supply voltage of 0.8 V as compared to the one not using the BP-DTMOS technique.
Keywords :
CMOS memory circuits; VLSI; content-addressable storage; low-power electronics; 0.8 V; CMOS CAM cell circuit; SOI DTMOS technology; bulk PMOS dynamic-threshold technique; content-addressable-memory; fast tag-compare capability; low-voltage VLSI systems; standard bulk CMOS technology; Associative memory; CADCAM; CMOS memory circuits; CMOS technology; Computer aided manufacturing; MOS devices; Random access memory; Telephony; Very large scale integration; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
Type :
conf
DOI :
10.1109/ISCAS.2002.1010523
Filename :
1010523
Link To Document :
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