DocumentCode
180799
Title
Analysis of the fault injection mechanism related to negative and positive power supply glitches using an on-chip voltmeter
Author
Zussa, Loic ; Dutertre, J.-M. ; Clediere, Jessy ; Robisson, B.
Author_Institution
Ecole Nat. Super. des Mines de St.-Etienne (ENSM.SE), Gardanne, France
fYear
2014
fDate
6-7 May 2014
Firstpage
130
Lastpage
135
Abstract
Power supply underpowering and negative power supply glitches are commonly used for the purpose of injecting faults into secure circuits. The related fault injection mechanism has been extensively studied: it is based on setup time violations. Positive power supply glitches are also used to inject faults. However, an increase of the supply voltage is not consistent with a mechanism based on setup time violation. Besides, no research work has yet identified the corresponding mechanism. In this work, we report the use of an embedded delay-meter to monitor the core voltage of a programmable device exposed to power supply glitches. It permitted us to gain a further insight into the mechanism associated with power glitches and also to identify the injection mechanism of positive power supply glitches.
Keywords
computerised instrumentation; digital voltmeters; field programmable gate arrays; microprocessor chips; FPGA; embedded delay-meter; fault attacks; fault injection mechanism; onchip voltmeter; power supply glitches; programmable device; setup time violation; Clocks;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware-Oriented Security and Trust (HOST), 2014 IEEE International Symposium on
Conference_Location
Arlington, VA
Print_ISBN
978-1-4799-4114-8
Type
conf
DOI
10.1109/HST.2014.6855583
Filename
6855583
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