Analog baseband chain with analog to digital converter (ADC) of Synthetic Aperture Radar (SAR) receiver

An analog baseband chain together with an analog to digital converter (ADC) for a Synthetic Aperture Radar (SAR) receiver implemented in 130nm CMOS technology is presented in this paper. The baseband and the ADC are integrated on a single chip, occupying 1.6mm² (I and Q branch) of active silicon area. The baseband is selectable between 50MHz and 160MHz bandwidth through switches and the voltage gain can be controlled between 22dB and 27dB. The ADC has selectable mode of 5, 6, 7 and 8 bits via control switches. The baseband and the ADC achieve measured spurious-free dynamic range more than 45dBc over the 160MHz band. The circuits, which use a 1.2V supply voltage, dissipates minimum power of 214mW with 50MHz baseband and 5 bit mode ADC, and maximum power of 344mW with 160MHz baseband and 8 bit mode ADC.