Title :
Application of group delay equalisation in testing fully-balanced OTA-C filters
Author :
Wilcock, R. ; Al-Hashimi, B.M.
Author_Institution :
Dept. of Electron. & Comput. Sci., Southampton Univ., UK
Abstract :
This paper proposes a new BIST structural testing methodology for fully-balanced OTA-C filters. The methodology is based on using a simple group-delay equaliser to emulate the filter function; any discrepancies resulting from comparing the filter and equaliser outputs indicates a faulty circuit. The test circuitry is designed using detailed analysis of the possible faults and their effects on the filter output. This ensures a high fault coverage and minimisation of test accuracy dependence on manufacturing process variations. Furthermore, the equaliser circuitry requires only a single low-precision capacitor and the test stimulus frequency does not need to be exact. Simulation, has shown that up to 99% fault coverage is possible when the proposed methodology is applied to a 4.5 MHz Chebyshev low pass filter. From actual layout, the estimated test circuitry area overhead is 20% which compares well with recently reported results.
Keywords :
CMOS analogue integrated circuits; Chebyshev filters; active filters; built-in self test; delays; equalisers; integrated circuit testing; low-pass filters; operational amplifiers; 4.5 MHz; BIST structural testing methodology; Chebyshev low pass filter; OTA-C filter testing; equaliser circuitry; filter fault models; fully-balanced OTA-C filters; group delay equalisation; group-delay equaliser; high fault coverage; test circuitry designed; Built-in self-test; Capacitors; Circuit faults; Circuit simulation; Circuit testing; Delay; Filters; Frequency; Manufacturing processes; Minimization;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010538