DocumentCode :
1808165
Title :
Design of the radar real-time simulation system joined with hardware
Author :
Chen, Yong ; Yao, Xinyu ; Wu, Wenbo ; Tang, Xiaofeng
Author_Institution :
Nat. Univ. of Defense Technol., Changsha, China
Volume :
4
fYear :
2011
fDate :
24-26 Dec. 2011
Firstpage :
2827
Lastpage :
2831
Abstract :
To improve the real-time property for typical Pulse Doppler radar simulation, an idea of signal-level simulation using hardware was proposed. The system framework and information flow was studied, then a host method of moving target echo simulation was given. Most of all, radar signal processing was realized by FPGA, which includes digital quadrature detection with IF sampling, pulse compression based on LFM, moving target detection with FFT filter, and cell average CFAR function modules. Finally, the target distance and velocity was achieved. The technology discussed could be used for single-radar precise simulation and electronic warfare simulation of multi-radars.
Keywords :
Doppler radar; field programmable gate arrays; radar signal processing; FFT filter; FPGA; cell average CFAR function modules; digital quadrature detection with IF sampling; hardware; information flow; moving target detection; pulse Doppler radar simulation; pulse compression; radar real-time simulation system; radar signal processing; real-time property; signal-level simulation; system framework; target distance; target velocity; FPGA; echo simulation; radar signal processing; real-time radar simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Science and Network Technology (ICCSNT), 2011 International Conference on
Conference_Location :
Harbin
Print_ISBN :
978-1-4577-1586-0
Type :
conf
DOI :
10.1109/ICCSNT.2011.6182552
Filename :
6182552
Link To Document :
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