DocumentCode
1808284
Title
A 2-Gb/s 16:1 multiplexer in 0.18-μm CMOS process
Author
Tang, X. ; Wang, X.J. ; Zhang, S.Y. ; Chi, Y.S. ; Jiang, N. ; Huang, F.Y.
Author_Institution
RF&OEIC Res. Inst., Southeast Univ., Nanjing
Volume
2
fYear
2008
fDate
21-24 April 2008
Firstpage
868
Lastpage
870
Abstract
By employing a tree-type structure and the pseudo-static logic circuits, a 16:1 multiplexer (MUX) is presented for high speed operations. The proposed circuit is realized in a standard 0.18 mum CMOS process. With a power consumption of 36.2 mW, the fully integrated MUX can operate at an output rate up to 2 Gb/s. The test results show that it works well at 2 Gb/s and could reach a 2.5 Gb/s data speed under normal temperature.
Keywords
CMOS logic circuits; multiplexing equipment; 16:1 multiplexer; CMOS process; bit rate 2 Gbit/s to 2.5 Gbit/s; power 36.2 mW; power consumption; pseudo-static logic circuits; size 0.18 mum; tree-type structure; CMOS process; Clocks; Delay; Energy consumption; Flip-flops; Frequency conversion; Latches; Logic circuits; Multiplexing; Timing; 16:1 multiplexer; pseudo-static logic; tree-type;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave and Millimeter Wave Technology, 2008. ICMMT 2008. International Conference on
Conference_Location
Nanjing
Print_ISBN
978-1-4244-1879-4
Electronic_ISBN
978-1-4244-1880-0
Type
conf
DOI
10.1109/ICMMT.2008.4540540
Filename
4540540
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