DocumentCode :
1808342
Title :
Pass transistor logic ALU design
Author :
Wagiran, R. ; Chong, A.B. ; Ahmad, I.
Author_Institution :
Dept. of Electr. & Electron. Eng., Univ. Putra Malaysia, Selangor, Malaysia
fYear :
2002
fDate :
19-21 Dec. 2002
Firstpage :
475
Lastpage :
479
Abstract :
The work presented here shows the comparison of IC design using Tanner EDA (arithmetic logic unit) of 74382 IC using static logic gate and pass logic gate. Tanner tools are used for the schematic and layout simulation as well as the schematic versus layout comparison. The simulation technology used is Mosis 2.0 μm.
Keywords :
CMOS logic circuits; MOSFET; logic design; logic simulation; semiconductor device models; 2 micron; Tanner tools; pass logic gate; pass transistor logic ALU design; simulation; static logic gate; Arithmetic; CMOS logic circuits; CMOS technology; Delay; Design engineering; Design methodology; Logic design; Logic gates; Multiplexing; Pulse inverters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Electronics, 2002. Proceedings. ICSE 2002. IEEE International Conference on
Print_ISBN :
0-7803-7578-5
Type :
conf
DOI :
10.1109/SMELEC.2002.1217869
Filename :
1217869
Link To Document :
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