DocumentCode
1808382
Title
Dynamic element matching in low oversampling delta sigma ADCs
Author
Li, Zhimin ; Fiez, Terri S.
Author_Institution
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
Volume
4
fYear
2002
fDate
2002
Abstract
Four dynamic element matching (DEM) algorithms are compared for a second-order and a fifth-order Δ-Σ ADC with the internal DAC realized with two different configurations. Simulations show that both SNDR and SFDR are significantly increased by using a DAC configuration that implements more unit elements. It is also found that with different oversampling ratios and architectures, the four algorithms behave differently in terms of the achieved overall SNDR and SFDR.
Keywords
circuit simulation; delta-sigma modulation; digital simulation; integrated circuit noise; SFDR; SNDR; dynamic element matching; internal DAC; low oversampling delta sigma ADCs; oversampling ratios; signal to (noise + distortion) ratio; spurious free dynamic range; unit elements; Circuit noise; Computational modeling; Digital modulation; Frequency conversion; Instruments; Linearity; Multi-stage noise shaping; Neodymium; Nonlinear distortion; Signal resolution;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN
0-7803-7448-7
Type
conf
DOI
10.1109/ISCAS.2002.1010548
Filename
1010548
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