Title :
Generator for Test Set Construction of SMGF in Reversible Circuit by Boolean Difference Method
Author :
Mondal, Bikromadittya ; Kole, Dipak Kumar ; Das, Debesh K. ; Rahaman, Hafizur
Author_Institution :
Dept. of Inf. Technol., Indian Inst. of Eng. Sci. & Technol., Shibpur, India
Abstract :
Reversible logic synthesis has received considerable attention in the light of advances recently made in quantum computation. Implementation of a reversible circuit is envisaged by deploying several special types of quantum gates, such as k-CNOT. Although the classical stuck-at fault model is widely used for testing conventional CMOS circuits, new fault models, namely single missing-gate fault (SMGF), repeated-gate fault (RGF), partial missing-gate fault (PMGF), and multiple missing-gate faults (MMGF), are likely to be more suitable for modeling defects in quantum k-CNOT gates. This work proposes an algorithm for deriving the test set for the detection of all single missing gate faults in a reversible circuit implemented with k-CNOT gates. Instead of deriving test set directly for the detection of missing gate faults, a Boolean generator is developed by Boolean difference method to derive the test set and to detect all the single missing gate faults of a reversible circuit. Experimental results on some benchmark circuits are also reported.
Keywords :
Boolean functions; automatic test pattern generation; logic testing; quantum gates; Boolean difference method; Boolean generator; SMGF; defect modeling; quantum k-CNOT gates; reversible circuit; reversible logic synthesis; single missing gate faults; test set construction generator; Benchmark testing; Circuit faults; Generators; Integrated circuit modeling; Logic circuits; Logic gates; Quantum computing; Boolean difference; Missing-gate faults; quantum computing; reversible logic; testable design; universal test set;
Conference_Titel :
Test Symposium (ATS), 2014 IEEE 23rd Asian
Conference_Location :
Hangzhou
DOI :
10.1109/ATS.2014.24