Title :
Analysis of CMOS RF LNAs with ESD protection
Author :
Chandrasekhar, Vinay ; Mayaram, Kartikeya
Author_Institution :
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
Abstract :
This paper presents an analysis that accounts for the effect of standard ESD structures on critical LNA specifications of noise figure, input matching and gain. A common-source-cascode CMOS RF LNA is used for this analysis. It is shown that the ESD structures degrade LNA performance particularly for higher frequency applications. The analysis has been validated with SpectreRF simulations for a 0.25-μm CMOS process. Design techniques are also proposed for designing LNAs with ESD protection.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; electrostatic discharge; impedance matching; integrated circuit design; integrated circuit noise; linear network analysis; protection; 0.25 micron; CMOS RF LNAs; ESD protection; LNA specifications; SpectreRF simulations; common-source cascode LNA; design techniques; gain; input matching; noise figure; Analytical models; Capacitance; Circuits; Electrostatic discharge; Impedance matching; Noise figure; Noise measurement; Process design; Protection; Radio frequency;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010578
