• DocumentCode
    180932
  • Title

    High Quality System Level Test and Diagnosis

  • Author

    Jutman, Artur ; Reorda, M. Sonza ; Wunderlich, H.-J.

  • Author_Institution
    Testonica Lab., Tallinn, Estonia
  • fYear
    2014
  • fDate
    16-19 Nov. 2014
  • Firstpage
    298
  • Lastpage
    305
  • Abstract
    This survey introduces into the common practices, current challenges and advanced techniques of high quality system level test and diagnosis. Specialized techniques and industrial standards of testing complex boards are introduced. The reuse for system test of design for test structures and test data developed at chip level is discussed, including the limitations and research challenges. Structural test methods have to be complemented by functional test methods. State-of-the-art and leading edge research for functional testing will be covered.
  • Keywords
    design for testability; printed circuit testing; chip level; complex boards testing; design for test structures; functional test methods; functional testing; high quality system level test; industrial standards; structural test methods; test data; Circuit faults; Inspection; Instruments; Manufacturing; Standards; System-on-chip; Testing; System test; board test; diagnosis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium (ATS), 2014 IEEE 23rd Asian
  • Conference_Location
    Hangzhou
  • ISSN
    1081-7735
  • Type

    conf

  • DOI
    10.1109/ATS.2014.62
  • Filename
    6979117