Title :
A hierarchy of physical design watermarking schemes for intellectual property protection of IC designs
Author :
Newbould, Rexford D. ; Carothers, Jo Dale ; Rodriguez, Jeffrey J. ; Holman, W. Timothy
Author_Institution :
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
Abstract :
A method is presented for embedding the same watermark multiple times into a single integrated circuit design using a hierarchy of incorporation techniques. This has the advantage of adding multiple independent signatures to the circuit in order to better resist large-scale attacks. A high degree of robustness is provided by requiring attacks on multiple stages of the VLSI design flow in order to properly efface the mark.
Keywords :
VLSI; copy protection; industrial property; integrated circuit design; IC designs; VLSI design flow; intellectual property protection; large-scale attack resistance; multiple independent signatures; multiple watermark embedding; physical design watermarking schemes; placement; routing; Algorithm design and analysis; Circuit synthesis; Costs; Embedded computing; Integrated circuit synthesis; Intellectual property; Protection; Robustness; Very large scale integration; Watermarking;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010594
