Title :
The design of Chinese speech synthesizer ASIC
Author :
Meng, Xianyuan ; Zhou, Zhaohui
Author_Institution :
Dept. of Electron. Eng., Tsinghua Univ., Beijing, China
Abstract :
This paper describes the chip design of a high-quality Chinese speech library with less-memory. With the VSELP encoding algorithm and the technique of breaking Chinese word into initial consonant and compound vowel, the storage capability of the Chinese speech library is dramatically reduced. A systolic array is used for implementing the coefficient conversion and filter of synthesizer. The virtual array architecture makes the chip simple
Keywords :
application specific integrated circuits; digital filters; digital signal processing chips; natural languages; speech synthesis; systolic arrays; Chinese speech library; Chinese speech synthesizer ASIC; Chinese word; VSELP encoding algorithm; coefficient conversion; compound vowel; filter; initial consonant; storage; systolic array; text to speech technology; virtual array architecture; Application specific integrated circuits; Chip scale packaging; Encoding; Filters; Libraries; Signal analysis; Speech analysis; Speech synthesis; Synthesizers; Vocabulary;
Conference_Titel :
Signal Processing, 1996., 3rd International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-2912-0
DOI :
10.1109/ICSIGP.1996.567342
