Title :
Inorganic ARC for 0.18 μm and sub-0.18 μm multilevel metal interconnects
Author :
Lee, Wei W. ; He, Qizhi ; Xing, Guoqiang ; Singh, Abha ; Zielinski, Eden ; Brennan, Ken ; Dixit, Girish ; Taylor, Kelly ; Liang, Chien-Sung ; Luttmer, JD ; Havemann, Bob
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
Abstract :
The accelerated control of critical dimensions (CD) in the sub-0.25 μm region for semiconductor manufacturing has increased worldwide interest in the antireflective coating (ARC) process. In this paper, we report on a novel inorganic ARC design for deep-UV lithography and implementation of the ARC into multilevel metal interconnects for 0.18 μm and sub-0.18 μm technologies. The designed SixO yNz ARC not only reduces substrate reflectivity to a minimum and prevents DUV resist footing, but also serves as a hard mask for metal etch. Back-end-of-line (BEOL) sub-0.25 μm multilevel metal patterning and etch with the SixOyNz ARC produced excellent metal profiles and 100% electrical comb yields. The designed ARC has also shown superior results to the conventional TiN metal ARC. The dielectric constant value is close to that of silicon oxide
Keywords :
antireflection coatings; etching; integrated circuit interconnections; integrated circuit measurement; integrated circuit metallisation; integrated circuit yield; masks; permittivity; photoresists; reflectivity; silicon compounds; ultraviolet lithography; 0.18 micron; 0.25 micron; DUV resist footing; SixOyNz ARC; SiON; SiON ARC; TiN; TiN metal ARC; accelerated critical dimension control; antireflective coating process; back-end-of-line etch; back-end-of-line multilevel metal patterning; deep-UV lithography; dielectric constant; electrical comb yield; inorganic ARC; inorganic ARC design; metal etch hard mask; metal profiles; multilevel metal interconnects; multilevel metal patterning; semiconductor manufacturing; substrate reflectivity; Acceleration; Coatings; Etching; Lithography; Manufacturing processes; Reflectivity; Resists; Semiconductor device manufacture; Substrates; Tin;
Conference_Titel :
Interconnect Technology Conference, 1998. Proceedings of the IEEE 1998 International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-4285-2
DOI :
10.1109/IITC.1998.704758
