Dielectric anti-reflection coating application in a 0.175 μm dual-damascene process

Author

Lee, G.Y. ; Lu, Z.G. ; Dobuzinsky, D.M. ; Ning, X.J. ; Costrini, G.

Author_Institution

IBM Semicond. Res. & Dev. Center, Siemens Microelectron. Inc., Hopewell Junction, NY, USA

fYear

1998

fDate

1-3 Jun 1998

Firstpage

87

Lastpage

89

Abstract

Various dielectric anti-reflection coatings (DARCs) were evaluated using 0.175 μm dual-damascene structures to examine the lithography process window and integration capability. Double-DARC layers have been developed with the optimum refractive indices and thickness, based on reflectance simulations and measurements, to provide better critical dimension (CD) control as compared to organic ARC and single-DARC layer applications. The integration scheme using a double-DARC layer provides substantial benefit for 0.175 μm metallization

Keywords

antireflection coatings; dielectric thin films; integrated circuit interconnections; integrated circuit measurement; integrated circuit metallisation; integrated circuit yield; photolithography; reflectivity; refractive index; size control; 0.175 micron; CD control; DARCs; critical dimension control; dielectric anti-reflection coating application; dielectric anti-reflection coatings; double-DARC layer; double-DARC layers; dual-damascene process; dual-damascene structures; integration capability; lithography process window; metallization; optimum refractive index; optimum thickness; organic ARC; reflectance measurements; reflectance simulations; single-DARC layer; Coatings; Dielectric measurements; Etching; Lithography; Pollution measurement; Reflectivity; Refractive index; Resists; Silicon; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 1998. Proceedings of the IEEE 1998 International

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-4285-2

Type

conf

DOI

10.1109/IITC.1998.704759

Filename

704759