55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter

Author

Huang, Tzu-Chi ; Chou, Wen-Shen ; Lee, Yu-Huei ; Yang, Yao-Yi ; Chen, Ke-Horng ; Peng, Yung-Chow ; Hsueh, Fu-Lung

Author_Institution

Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2011

fDate

12-16 Sept. 2011

Firstpage

383

Lastpage

386

Abstract

This 55nm CMOS 12-bit current-steering DAC directly powered by the single-inductor dual-output (SIDO) switching DC-DC converter with the dynamic voltage scaling (DVS) technique improves the DAC´s power efficiency by 25% and achieves 65.34dB SFDR. The proposed 3S method, including separating, splitting, and shifting, effectively reduces the current mismatching within 0.2% and suppresses the switching noise interference from the SIDO converter. The 12-bit DAC and SIDO module achieve compatible performance compare to the tradition method and has the benefit of area and energy efficiency.

Keywords

CMOS integrated circuits; DC-DC power convertors; digital-analogue conversion; interference suppression; 3S method; CMOS current-steering digital-to-analog converter; area efficiency; dynamic voltage scaling technique; energy efficiency; frequency 250 MHz; single-inductor dual-output switching DC-DC converter; size 55 nm; switching noise interference suppression; word length 12 bit; CMOS integrated circuits; Current measurement; Inductors; Noise; Solid state circuits; Switches; Voltage control; DC-DC converter; Digital to analog converter (DAC); Dynamic voltage scaling (DVS); Single-inductor dual-output (SIDO);

fLanguage

English

Publisher

ieee

Conference_Titel

ESSCIRC (ESSCIRC), 2011 Proceedings of the

Conference_Location

Helsinki

ISSN

1930-8833

Print_ISBN

978-1-4577-0703-2

Electronic_ISBN

1930-8833

Type

conf

DOI

10.1109/ESSCIRC.2011.6044987

Filename

6044987