Hybrid buck-linear (HBL) technique for enhanced dip voltage and transient response in load-preparation buck (LPB) converter

A hybrid buck-linear (HBL) technique in a load-preparation buck (LPB) converter for system-on-a-chip (Soc) is proposed in this paper. In case of the sudden load variation in Soc, the proposed converter with hybrid operation can effectively enhance the transient response with smaller dip voltage and faster transient recovery time. In addition, the high power conversion efficiency can be derived since an auxiliary power switch assures that hybrid operation is only activated in load transient period. Experimental results demonstrate that the improvements of transient dip voltage and recovery time are 53% and 63%, respectively, as well as 8% in efficiency. The chip was fabricated by 0.25 μm CMOS process with a peak efficiency of 95% for Soc applications.