Title :
A 0.9-V 0.2-μW CMOS single-opamp-based switched-opamp ΣΔ modulator for pacemaker applications
Author :
Cheung, Vincent S L ; Luong, Howard ; Chan, Mansun
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
Abstract :
A 3rd-order lowpass ΣΔ modulator operating with a 0.9-V supply voltage is realized with a standard 0.35-μm CMOS process. To achieve ultra-low-power and tiny-chip-area design, single-opamp-based ΣΔ modulator architecture is proposed and implemented with switched-opamp technique. Employing a novel opamp design with three switching output pairs, the ΣΔ modulator achieves a SNR of 75dB at an ultra low power consumption of 0.2μW, which is more than an order lower than existing designs.
Keywords :
CMOS integrated circuits; integrated circuit layout; low-power electronics; operational amplifiers; pacemakers; sigma-delta modulation; 0.2 muW; 0.35 micron; 0.9 V; CMOS; SNR; pacemaker applications; single-opamp-based switched-opamp ΣΔ modulator; switching output pairs; tiny-chip-area design; ultra-low-power design; Batteries; CMOS technology; Clocks; Delta modulation; Energy consumption; Integrated circuit reliability; Pacemakers; Phase modulation; Topology; Voltage;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010671
