Performance and manufacturability of the Co/Ti (cap) silicidation process for 0.25 μm MOS-technologies

Author

Lauwers, Anne ; Besser, Paul ; De Potter, Muriel ; Kondoh, Eiichi ; Roelandts, Nico ; Steegen, An ; Stucchi, Michele ; Maex, Karen

Author_Institution

IMEC, Leuven, Belgium

fYear

1998

fDate

1-3 Jun 1998

Firstpage

99

Lastpage

101

Abstract

Recently, CoSi₂ has been introduced in MOS manufacturing. Several CoSi₂ formation processes have been proposed. The single layer of Co on Si has been replaced by other processes because of its poor manufacturability. Major problems include its sensitivity to cleaning and irreproducible yield on narrow lines, partly attributed to a silicide thinning effect at the edges of the silicide lines. The Ti/Co (Ti at interface) process has been introduced to alleviate the requirements for cleaning and has been proposed for its epitaxial CoSi₂ growth. The Co/TiN process has been reported to have a large process window with respect to the control of lateral growth. The Co/Ti (Ti cap) process has been shown to be a very promising process and its scalability towards 0.1 μm and below has been demonstrated. In this paper, the role of the Ti cap in CoSi₂ formation is presented and the performance and manufacturability of the process for ⩽0.25 μm processes are discussed

Keywords

MOS integrated circuits; cobalt; integrated circuit interconnections; integrated circuit metallisation; integrated circuit yield; interface structure; surface cleaning; titanium; 0.25 micron; Co single layer on Si formation process; Co-Si; Co-Ti cap process; Co-Ti cap silicidation process; Co-Ti-Si; Co-TiN; Co/TiN process; CoSi₂ MOS manufacturing; CoSi₂ formation; CoSi₂ formation processes; CoSi₂-Ti-Si; MOS technology; Si; Ti cap role; Ti interface layer; cleaning; cleaning sensitivity; epitaxial CoSi₂ growth; irreproducible yield; lateral growth control; manufacturability; narrow lines; process performance; process scalability; process window; silicide line edges; silicide thinning effect; Chemicals; Conductivity; Etching; Manufacturing processes; Silicidation; Silicides; Temperature; Thermal stresses; Time measurement; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology Conference, 1998. Proceedings of the IEEE 1998 International

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-4285-2

Type

conf

DOI

10.1109/IITC.1998.704762

Filename

704762