DocumentCode
1811881
Title
InP DHBT circuits for 100 Gb/s Ethernet applications
Author
Weimann, Nils G. ; Houtsma, V. ; Baeyens, Y. ; Weiner, J. ; Tate, A. ; Frackoviak, J. ; Chen, Y.K.
Author_Institution
Bell Labs., Alcatel-Lucent, Murray Hill, NJ
fYear
2008
fDate
25-29 May 2008
Firstpage
1
Lastpage
4
Abstract
We present key high-speed analog circuits and digital building blocks realized in our 0.5 mum InP DHBT technology. The transistor cutoff frequency of 400 GHz enables circuits with bandwidth and clock speed suitable for application to 100 Gb/s fiber-optic transmission systems.
Keywords
III-V semiconductors; bipolar analogue integrated circuits; bipolar digital integrated circuits; bipolar transistor circuits; heterojunction bipolar transistors; indium compounds; optical fibre LAN; DHBT circuits; Ethernet; InP; bandwidth; bit rate 100 Gbit/s; clock speed; cutoff frequency; digital building blocks; fiber-optic transmission systems; frequency 400 GHz; high-speed analog circuits; Chemicals; Circuits; Contact resistance; Cutoff frequency; DH-HEMTs; Dry etching; Ethernet networks; Heterojunction bipolar transistors; Indium gallium arsenide; Indium phosphide; Amplifier; Demux; HBT; Heterostructure; InP; Mux;
fLanguage
English
Publisher
ieee
Conference_Titel
Indium Phosphide and Related Materials, 2008. IPRM 2008. 20th International Conference on
Conference_Location
Versailles
ISSN
1092-8669
Print_ISBN
978-1-4244-2258-6
Electronic_ISBN
1092-8669
Type
conf
DOI
10.1109/ICIPRM.2008.4702916
Filename
4702916
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